DFT Staff Engineer

that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded... (Stuck-At, At-Speed, Path-Delay) and scan compression Experience in debugging low coverage and DRC fixes Proficient...

Lugar: Santa Clara, CA | 28/01/2026 19:01:40 PM | Salario: S/. No Especificado | Empresa: Advanced Micro Devices

Senior High-Speed Analog Layout Engineer

design and verification Perform and debug full hierarchy LVS, DRC, PERC, ERC, and other signoff checks using industry..., including LVS, DRC, PERC, Density, DFM, ERC, and Antenna rules Experience working in collaborative environments...

Lugar: San Jose, CA | 28/01/2026 19:01:58 PM | Salario: S/. No Especificado | Empresa: Chelsea Search Group

Senior High-Speed Analog Layout Engineer

design and verification Perform and debug full hierarchy LVS, DRC, PERC, ERC, and other signoff checks using industry..., including LVS, DRC, PERC, Density, DFM, ERC, and Antenna rules Experience working in collaborative environments...

Lugar: Austin, TX | 28/01/2026 19:01:24 PM | Salario: S/. No Especificado | Empresa: Chelsea Search Group

ASIC/SOC DFT Engineer (Silicon Engineering)

will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product... and physical design Scan Design Rule Check (DRC) tools Integration and verification of Design for Test (DFT) fabrics and IP...

Lugar: USA | 27/01/2026 18:01:34 PM | Salario: S/. No Especificado | Empresa: SpaceX

Director II, US Market Access Pipeline

TASC, CSM, LMG, DRC, etc. Contribute critical strategic thinking to inform access and pricing assumptions to create... relationships and navigate complex organizational systems Deep subject matter expertise relevant to complex US Market Access...

Lugar: Illinois | 25/01/2026 18:01:24 PM | Salario: S/. No Especificado | Empresa: AbbVie

Director II, US Market Access Pipeline

TASC, CSM, LMG, DRC, etc. Contribute critical strategic thinking to inform access and pricing assumptions to create... relationships and navigate complex organizational systems Deep subject matter expertise relevant to complex US Market Access...

Lugar: Illinois | 25/01/2026 00:01:45 AM | Salario: S/. No Especificado | Empresa: AbbVie

Senior Layout Design Engineer

transceivers and mixed-signal circuits for wireless communication systems along with circuit designers. Job Qualifications... experience on advance nodes including FinFET technologies. High level of proficiency in interpretation of CALIBRE DRC, ERC, LVS...

Lugar: San Jose, CA | 22/01/2026 18:01:39 PM | Salario: S/. No Especificado | Empresa: Protingent

Senior Layout Design Engeer

communication systems along with circuit designers. This is a contract position. Requirements Associate and Bachelor's Degree... including FinFET technologies. High level of proficiency in interpretation of CALIBRE DRC, ERC, LVS, reports. Extensive...

Lugar: San Jose, CA | 22/01/2026 18:01:53 PM | Salario: S/. No Especificado | Empresa: Saige Partners