SW Engineer Package Layout Design 3D-IC Solutions

verification to ensure LVS (Layout Versus Schematic) and DRC (Design Rule Check) cleanliness. Develop robust scripts... verification tools for LVS and DRC in 3D-IC environments. Strong problem-solving abilities and a proactive approach to identifying...

Lugar: Santa Clara, CA | 30/04/2026 19:04:02 PM | Salario: S/. $109800 - 197700 per year | Empresa: Siemens

Physical Design and Verification Engineer

timing, noise, IR-Drop and EMIR violations. Experience in physical design verification to debug LVS/DRC/PERC issues at the... of complex ASIC systems at advanced technology nodes, preferably 16nm and below. Experience in DFT (Design For Test) flows...

Lugar: Fremont, CA - Austin, TX | 30/04/2026 18:04:07 PM | Salario: S/. No Especificado | Empresa: Neuralink

Photonics Layout and Tooling Engineer

to testing and analysis, for complex photonic devices and systems-on-chip. Collaborate with experienced designers on innovative... checks. Experience with manufacturing automation concepts and protocols (e.g., GDS, DRC, DFT) is highly desirable...

Lugar: New York | 30/04/2026 00:04:35 AM | Salario: S/. No Especificado | Empresa: Nokia