SMTS GF Labs Design Enablement

manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform.... Create and maintain mini DRC decks to enable physical design rule evaluation and verification. Design and implement layout...

Lugar: Malta, NY | 25/02/2026 20:02:14 PM | Salario: S/. No Especificado | Empresa: GlobalFoundries

Principal ASIC Design Engineer

About TTM TTM Technologies, Inc. is a leading global manufacturer of technology products, including mission systems, radio... Signal Floor-planning, Layout, Integration & Verification Cost Analysis Support Cadence Design Systems Tool Suite...

Lugar: New York City, NY | 25/02/2026 01:02:02 AM | Salario: S/. No Especificado | Empresa: TTM Technologies

Staff DFT Engineer

to advance, the performance drivers for data center infrastructure are shifting from systems-on-chip (SOCs) to systems of chips... execution-driven role requiring end-to-end ownership of DFT insertion, verification, DRC closure, and test coverage closure...

Lugar: Santa Clara, CA | 25/02/2026 01:02:32 AM | Salario: S/. $128000 - 189370 per year | Empresa: Marvell

Senior PIC Design Engineer

to advance, the performance drivers for data center infrastructure are shifting from systems-on-chip (SOCs) to systems of chips... and top-level block placement to micro-architecture, optical & electrical routing, and back-end DRC and LVS verification...

Lugar: Santa Clara, CA | 24/02/2026 19:02:23 PM | Salario: S/. $113900 - 168500 per year | Empresa: Marvell

Manager, IT - Procurement

+ years of experience in Information Systems and of SAP functional and configuration experience. 4+ years leading the... Goods movement. Deep understanding of Integration between SAP and Non-SAP applications (e.g., SAP ECC, S4HANA, SAP DRC...

Lugar: Chicago, IL | 24/02/2026 18:02:50 PM | Salario: S/. $102100 - 127600 per year | Empresa: Kraft Heinz

Principal Layout Engineer

LVS, DRC, ERC tools Conduct layout reviews to document and show that the requirements are met, and any necessary waivers...’s systems. Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee...

Lugar: San Jose, CA | 22/02/2026 18:02:56 PM | Salario: S/. No Especificado | Empresa: Rambus

PCB Layout Automation Intern

Support Assist with basic routing and placement tasks Run design rule checks (DRC) and analyze results Support engineering... Interest in high-speed networking systems What You’ll Gain Real-world experience developing engineering automation tools...

Lugar: Sunnyvale, CA | 22/02/2026 03:02:16 AM | Salario: S/. No Especificado | Empresa: Hewlett Packard Enterprise

Principal Layout Engineer

using LVS, DRC, ERC tools Conduct layout reviews to document and show that the requirements are met, and any necessary... essential for tomorrow’s systems. Rambus offers a competitive compensation package including base salary, bonus, equity...

Lugar: San Jose, CA | 21/02/2026 23:02:50 PM | Salario: S/. No Especificado | Empresa: Rambus

Principal Physical Design Engineer

, IR/EM mitigation, and DRC fixing. Debug tool issues, convergence challenges, and signoff discrepancies across STA, LVS, DRC..., and DRC. Drive correlation improvements between FC/Innovus and signoff tools (PrimeTime, StarRC, Voltus, RedHawk, Calibre...

Lugar: Sunnyvale, CA | 21/02/2026 18:02:09 PM | Salario: S/. No Especificado | Empresa: Hewlett Packard Enterprise

Senior Photonic-Integrated-Circuit Engineer

circuit components and systems. Designs and optimizes photonic integrated circuits (PICs) and plays a key role in the..., fiber or free-space coupling. Exposure to EDA/PDA tools and methodologies. Familiarity with LVS, SDL, and DRC. PIC test...

Lugar: Santa Clara, CA | 20/02/2026 18:02:51 PM | Salario: S/. No Especificado | Empresa: Intel