Senior Analog Layout Manager

development, circuit design, physical design, packaging, etc., is a function team responsible of validating all Marvell HSS IPs...) develops Marvell's most advanced High-Speed SerDes (HSS) IPs covering multiple applications, Switch, Storage, Optics...

Lugar: San Diego, CA | 01/05/2026 01:05:05 AM | Salario: S/. $138200 - 204460 per year | Empresa: Marvell

Senior Superintendent

Job Description: At IPS, we are global leaders in developing innovative solutions for the consulting, architecture... for close-out documentation to the IPS Commissioning/Validation team and client. Assumes primary responsibility...

Lugar: Somerset, NJ | 13/04/2026 00:04:01 AM | Salario: S/. $147000 - 197000 per year | Empresa: Integrated Project Services

Senior Superintendent

Job Description: Job Description At IPS, we are global leaders in developing innovative solutions for the... of Construction Completion Records for close-out documentation to the IPS Commissioning/Validation team and client. Assumes primary...

Lugar: Somerset, NJ | 12/04/2026 02:04:21 AM | Salario: S/. $147000 - 197000 per year | Empresa: Integrated Project Services

Silicon Design and Validation Engineer

test debug and validation of clock generation and timing IPs, data converters, TIAs, modulator drivers, clock and data... of advanced packaging (2.5D / 3D) architectures. Highly Desired Qualifications: Strong written and verbal communication skills...

Lugar: San Jose, CA | 22/04/2026 00:04:42 AM | Salario: S/. $120000 - 192000 per year | Empresa: Broadcom

Senior Mechanical Engineer

Job Description Summary We are seeking a Senior Mechanical Engineer to lead the packaging, structural, and thermal..., with responsibility for developing cooling systems, enclosures, and packaging architectures for high-density power electronics operating...

Lugar: USA | 24/05/2026 19:05:07 PM | Salario: S/. $113200 - 188800 per year | Empresa: GE Vernova

Senior Integrated Circuit Digital Design Engineer

, verification, validation, fabrication, packaging, debugging, test development, failure analysis, and documentation. You will work... using Verilog and SystemVerilog HDL and utilize in-house digital IPs to extend functionality and/or to be compatible...

Lugar: Goleta, CA | 25/03/2026 02:03:08 AM | Salario: S/. $95500 - 181700 per year | Empresa: Raytheon Technologies