Senior Staff CAD Engineer

& Signoff: Create, automate, and maintain robust chip-level and IP signoff flows using Siemens Calibre for DRC/LVS and Synopsys... of Siemens Calibre (DRC, LVS, PERC), Synopsys StarRC, and the Cadence Virtuoso/Innovus ecosystem. Scripting & Automation...

Lugar: San Jose, CA | 19/06/2026 17:06:35 PM | Salario: S/. $65 - 75 per hour | Empresa: Protingent

Front-End Infrastructure Engineer

& Vendor Management: You act as the point of contact for VCS Synopsys issues, providing in-depth debugging, troubleshooting..., and solutions to complex problems. Regularly liaise with Synopsys vendors and other EDA partners to coordinate tool support...

Lugar: Austin, TX | 28/04/2026 17:04:19 PM | Salario: S/. No Especificado | Empresa: Protingent

Electrical Engineer/ FPGA Engineer

), Reset Domain Crossing (RDC), Questa Lint, Synopsys (DC/Primetime/Synplify), Xilinx/Intel/Microchip EDA (Vivado/Libero... flows/methodologies including Synopsys DC/Primetime/Synplify, Xilinx/Intel/Microchip EDA including HLS, Mentor Questa family...

Lugar: Camden, NJ | 25/03/2026 18:03:52 PM | Salario: S/. No Especificado | Empresa: Innova Solutions
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