HBM SoC RTL Design Engineer

considerations. Familiarity with EDA tools from Cadence, Synopsys, and/or Siemens. Programming or scripting experience (e.g...

Lugar: Folsom, CA | 23/09/2026 02:09:42 AM | Salario: S/. $121000 - 247000 per year | Empresa: Micron

Staff Digital Physical Implementation and Integration Engineer

abstractions and ECO fixing. Hands-on expertise with Cadence Innovus Hierarchical Flow or Synopsys ICC2 Design Planning — virtual...-vendor AI tools — Cadence Cerebrus / JedAI, Synopsys DSO.ai and copilots, or equivalent. Contributions to methodology or CAD...

Lugar: San Jose, CA | 13/08/2026 19:08:38 PM | Salario: S/. $145000 - 246000 per year | Empresa: Micron

Principal Analog/Mixed Signal CAD Engineer

parasitic extraction flows, with strong hands-on experience in Cadence Quantus and/or Synopsys StarRC, including extraction... within the Cadence Virtuoso, Synopsys OptoCompiler and Siemens Calibre environments. Install, validate, and support foundry PDKs...

Lugar: Santa Clara, CA | 04/11/2026 21:11:09 PM | Salario: S/. $150680 - 225700 per year | Empresa: Marvell

HBM SoC Physical Design Engineer

. Proficiency with industry EDA tools (e.g., Cadence Innovus/Tempus, Synopsys ICC2/PrimeTime, Siemens Calibre or equivalent). Solid...

Lugar: Folsom, CA | 24/10/2026 20:10:35 PM | Salario: S/. $103000 - 210000 per year | Empresa: Micron

Synthesis & STA Engineer – High-Speed SerDes

, and exception handling. Expertise in STA methodology and timing closure at both block and full-chip level using Synopsys PrimeTime.../Conformal) in advanced nodes (5nm/3nm and below). Proficiency with Cadence and/or Synopsys physical design/STA toolchains...

Lugar: San Jose, CA | 07/11/2026 03:11:45 AM | Salario: S/. $160000 - 200000 per year | Empresa: Astera Labs

Sr. Design Verification Engineer - Digital

for verification automation, and industry-leading EDA verification tools (Synopsys VCS, Cadence Xcelium, Siemens Questa). Experience... logic and mixed-signal interfaces Formal verification experience using JasperGold, Synopsys VC Formal, or equivalent...

Lugar: San Diego, CA | 17/09/2026 01:09:31 AM | Salario: S/. $130000 - 200000 per year | Empresa: Sierra Wireless

Tech Lead, Digital Design Engineer

-functional partners. Apply Synopsys and/or Cadence digital design flows to deliver production-quality silicon. Verification... blocks from architecture through GDS and working with Synopsys and/or Cadence design tools and flows. Authorized to work...

Lugar: San Jose, CA | 07/11/2026 03:11:41 AM | Salario: S/. $175500 - 195000 per year | Empresa: Astera Labs