Design Verification Senior Principal Engineer
of digital design principles and methodologies. Experience with industry-standard verification tools (e.g., Cadence, Synopsys...
of digital design principles and methodologies. Experience with industry-standard verification tools (e.g., Cadence, Synopsys...
and verification (e.g., Cadence, Synopsys). Experience with lab equipment for signal integrity analysis and debugging (e.g...
, SVA assertions Unix, Linux Unified Power Format (UPF) Front-end ASIC design tools, especially Synopsys Design... Compiler Cadence Genus Synopsys Spyglass Cadence Conformal(-LP) ASIC simulation/verification tools, especially...
such as Cadence, Synopsys, or Mentor Graphics. Technical Skills: Proficiency in HDL languages (e.g., Verilog, VHDL) and scripting...
with Cadence, Siemens and/or Synopsys emulators Expertise with emulators and how to debug system level problems Familiarity...
Job description: We are looking for senior ASIC Synthesis and STA Engineer who will be responsible to prepare SDC and run physical synthesis using Synopsys... Must have driven at least one project using Synopsys Fusion compiler Good knowledge of optimization technique for power, area...
Transfer Level (RTL) and X propagation simulations using tools such as Synopsys Verdi; DE developing C++ test cases...
, Synopsys Tetramax), Scan/MBIST diagnostic (logical and physical layout aware), and DFT Insertion (Siemen Tessent Shell MBIST... and BSCAN, Synopsys Design Compiler (DC)) Strong knowledge of C/C++, Perl, Python, VCS, NC-Verilog, and Linux environment...
., OpenLane, Cadence, Mentor Graphics, Synopsys). Experience with scripting languages (e.g., Python, Tcl) for automation...
Ten). Proficient in developing and monitoring metrics and KPIs. Experience with application security testing tools (Synopsys, OpenText...