CPU Physical Design Timing Engineer (Austin, TX)

. Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus. Run Primetime and/or Tempus for STA... environment. Familiar with digital flow design implementation RTL to GDS : ICC, Innovus , PT/Tempus Minimum Qualifications...

Lugar: Austin, TX | 30/06/2026 21:06:03 PM | Salario: S/. $122500 - 183700 per year | Empresa: Qualcomm

ASIC Methodology Engineer

timing analysis (STA) tools, e.g., PrimeTime and Tempus Problem-solving and analytical mindset Preferred Qualifications...

Lugar: Santa Clara, CA | 25/06/2026 17:06:01 PM | Salario: S/. No Especificado | Empresa: Qualcomm