Lead ASIC Design Engineer

: Drive logic synthesis (e.g., Design Compiler, Genus), Static Timing Analysis (STA via PrimeTime/Tempus), and run static...

Lugar: San Jose, CA | 20/06/2026 20:06:35 PM | Salario: S/. No Especificado | Empresa: Broadcom

Physical Design Engineer

or below process technologies. Experience working with EDA tools like Innovus, Tempus/Primetime, Redhawk/Voltus or Calibre/Pegasus...

Lugar: San Jose, CA | 13/06/2026 17:06:04 PM | Salario: S/. No Especificado | Empresa: Cisco Systems

Principal Engineer, Digital Design Engineer (AI/ML)

(Genus), STA and power analysis (Tempus), and logical equivalence checking (Conformal) Lead architecture and design reviews..., BIST), and clock domain crossing methodologies Proficiency with Cadence digital design tools: Genus, Innovus, Tempus, Conformal...

Lugar: Chandler, AZ | 12/06/2026 22:06:40 PM | Salario: S/. No Especificado | Empresa: Analog Devices

RTL2 GDS, Sr Principal AE

, and Logical Equivalence Checking Prior experience with Cadence tools such as Genus, Innovus, Conformal, Tempus, Modus, Voltus...

Lugar: USA | 12/06/2026 17:06:50 PM | Salario: S/. $126000 - 234000 per year | Empresa: Cadence Design Systems
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