Senior Digital IC Design Engineer

cycle, from specification and RTL design through functional and physical verification, all the way to post‑silicon... between digital logic and analog/mixed‑signal blocks. Experience with full design flow: architecture, RTL design, synthesis...

Lugar: Dresden, Sachsen | 25/04/2026 17:04:38 PM | Salario: S/. No Especificado | Empresa: Ferroelectric Memory

Senior Digital Design Engineer (f/m/div)

Perform RTL coding using state-of-the-art HDLs and ensure bug-free, first-time-right designs Support dependent departments... experience, and familiarity with state-of-the-art design techniques, tools, and RTL-synthesis Knowledge of Lint, CDC, RDC, DfT...

Lugar: München, Bayern | 22/04/2026 02:04:48 AM | Salario: S/. No Especificado | Empresa: Infineon

ASIC Digital Design Expert (f/m/div)

all the way through to final RTL implementation and lab validation You will uphold our “First Time Right†design philosophy... verification;this encompasses authoring detailed specifications, development of high-quality RTL code including performance...

Lugar: Dresden, Sachsen | 20/04/2026 02:04:02 AM | Salario: S/. No Especificado | Empresa: Bosch

IC Digital Design Technical Lead

complex digital systems (MCU, DSP, accelerators) Strong RTL design skills with production‑quality IP Solid understanding... of semiconductor design experience Strong RTL design skills (Verilog/SystemVerilog) Experience with MCU/DSP systems and digital IP...

Lugar: München, Bayern | 17/04/2026 17:04:41 PM | Salario: S/. €115842 - 173763 per year | Empresa: Michael Page

ASIC Digital Design Expert (f/m/div)

all the way through to final RTL implementation and lab validation You will uphold our “First Time Right†design philosophy... verification;this encompasses authoring detailed specifications, development of high-quality RTL code including performance...

Lugar: Dresden, Sachsen | 16/04/2026 22:04:00 PM | Salario: S/. No Especificado | Empresa: Bosch

Senior Software Engineer API - Node.js, SQL

– fast, hands-on, and without unnecessary meeting overhead. smartclip is the adtech development unit of RTL Group — Europe... of smartclip will merge with RTL AdConnect and G&J iMS to form RTL AdAlliance, an international advertising and technology sales...

Lugar: Hamburg | 16/04/2026 17:04:06 PM | Salario: S/. No Especificado | Empresa: Smartclip

DSP ASIC Design Engineer - Optical Transmission Systems

architecture and functional requirements to define and refine digital design specifications Develop, integrate, and optimize RTL...‑on expertise with C++ development for High‑Level Synthesis (HLS) Proficiency in generating RTL from C++ models using CatapultC...

Lugar: Braunschweig, Niedersachsen | 13/04/2026 02:04:56 AM | Salario: S/. No Especificado | Empresa: Ciena