Staff PIC Design Engineer

to advance, the performance drivers for data center infrastructure are shifting from systems-on-chip (SOCs) to systems of chips...-architecture, optical & electrical routing, and back-end DRC and LVS verification. Work in conjunction with broader analog...

Lugar: Santa Clara, CA | 25/02/2026 01:02:57 AM | Salario: S/. $119620 - 179200 per year | Empresa: Marvell

Staff DFT Engineer

to advance, the performance drivers for data center infrastructure are shifting from systems-on-chip (SOCs) to systems of chips... execution-driven role requiring end-to-end ownership of DFT insertion, verification, DRC closure, and test coverage closure...

Lugar: Santa Clara, CA | 24/02/2026 20:02:30 PM | Salario: S/. $128000 - 189370 per year | Empresa: Marvell

Senior Photonic-Integrated-Circuit Engineer

circuit components and systems. Designs and optimizes photonic integrated circuits (PICs) and plays a key role in the..., fiber or free-space coupling. Exposure to EDA/PDA tools and methodologies. Familiarity with LVS, SDL, and DRC. PIC test...

Lugar: Santa Clara, CA | 21/02/2026 01:02:21 AM | Salario: S/. No Especificado | Empresa: Intel

Senior FPGA Engineer

satellite communication systems such as DVB-S2X, LPI/LPD, 5G-NR, etc. Designing the implementations for further advances..., and other DRC centric tools Experience with ModelSim/QuestaSim simulation tools Experience with Altera/Xilinx development tools...

Lugar: Virginia | 19/02/2026 01:02:15 AM | Salario: S/. No Especificado | Empresa: iDirect GOVERNMENT

Principal Computer Aided Design Engineer

of superconducting cryogenic control and readout circuits operating at millikelvin temperatures for scalable quantum computing systems.... Establish and own physical-design, layout, and verification workflows, including design-rule checks (DRC), electrical-rule check...

Lugar: Redmond, WA | 18/02/2026 01:02:57 AM | Salario: S/. No Especificado | Empresa: Microsoft

Senior PCB Layout Engineer 4

, communicates clearly, and consistently delivers high‑quality layout work for high‑performance RF and mixed‑signal systems. You’ll... packages and coordinate with PCB vendors to ensure high‑quality builds. Conduct design rule checks (DRC), signal‑integrity...

Lugar: San Diego, CA | 13/02/2026 18:02:18 PM | Salario: S/. $140000 - 180000 per year | Empresa: Monarch Quantum

Lead MTS Analog Engineering

activity support Qualifications Deep understanding the process device ESD/LU/EOS. Deep understanding ERC/DRC/LVS..., and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow’s systems. Rambus...

Lugar: San Jose, CA | 11/02/2026 23:02:51 PM | Salario: S/. No Especificado | Empresa: Rambus

Principal DFT Engineer (Silicon Engineering)

will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product... Scan Design Rule Check (DRC) tools Integration and verification of Design for Test (DFT) fabrics and IP within Subsystems...

Lugar: USA | 03/02/2026 18:02:31 PM | Salario: S/. No Especificado | Empresa: SpaceX