ASIC Design Engineer Staff

of our fast-paced chip design group, you will become an expert in building high-speed ASICs, from specifications to final netlist... skills in leading and implementing high performance modules from specification to final netlist. Knowledge of Computer...

Lugar: Sunnyvale, CA | 14/12/2025 02:12:28 AM | Salario: S/. No Especificado | Empresa: Hewlett Packard Enterprise

DFM Valor Engineer

Qualifications: Experience with scripting for automation (VBScript, Python). Familiarity with other EDA tools and basic netlist...

Lugar: Irvine, CA - Palo Alto, CA | 05/12/2025 19:12:26 PM | Salario: S/. No Especificado | Empresa: Rivian

CAD and PPA Methodology Engineer

tools · Design constraint management for power, timing, clocking, interfaces · Formal Verification for RTL-netlist... and netlist-netlist checks · Clock Tree Analysis and Optimization · ECO methods for functional and timing fixes · Managing...

Lugar: San Diego, CA | 19/11/2025 01:11:11 AM | Salario: S/. No Especificado | Empresa: Qualcomm

Sr Physical Design Engineer

Evaluate feasibility of architectural features through back end implementation Deliver a synthesized netlist to ASIC...

Lugar: Austin, TX | 06/11/2025 18:11:50 PM | Salario: S/. No Especificado | Empresa: Ericsson

SoC Physical Design Engineer, PnR

partition(s) (from netlist to tapeout) for a highly complex SOC utilizing innovative process technology. Description Work.... • Complete netlist to GDS2 implementation for partition(s) meeting schedule and design goals. • Timing, physical and electrical...

Lugar: Sunnyvale, CA | 06/11/2025 02:11:35 AM | Salario: S/. No Especificado | Empresa: Apple