Testbench/Verification Engineer

frameworks and testbenches, processes and flows. Proficient in debugging testbench and RTL code using simulation tools... in debugging the test-bench, VIP, RTL code NICE TO HAVE: Familiarity with the Fabric, NOC solutions is a bonus TekWissen...

Lugar: Boxborough, MA | 14/01/2026 18:01:21 PM | Salario: S/. No Especificado | Empresa: TekWissen

FPGA Design Verification Engineer

, System Verilog, RTL). · Write and debug test cases to verify functionality, performance, and corner cases. · Identify... functions may be required. What you need: · Strong understanding of FPGA, ASIC, RTL design principles and architectures...

Lugar: Mountain View, CA | 07/12/2025 00:12:50 AM | Salario: S/. No Especificado | Empresa: UST
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