Senior Mixed-Signal IC Designer

. Experience in transistor level digital circuit design from schematics to layout using schematic and RTL capture. Experience... from RTL to GDS is a plus Familiarity with open-source analog and digital IC design tools is a plus Familiarity with FPGA...

Lugar: Alameda, CA | 29/01/2026 19:01:51 PM | Salario: S/. $200000 - 250000 per year | Empresa: Protocol Labs

Principal DSP Engineer

and digital designers. Create DSP and FEC hardware block specifications appropriate for RTL implementation. Perform research...

Lugar: Santa Clara, CA | 27/11/2025 22:11:47 PM | Salario: S/. $154240 - 231000 per year | Empresa: Marvell

DSP Architecture System Modeling Engineer

influence architecture, DSP/RTL design, validation, and customer applications. Ideal candidates excel in C/C++ DSP... blocks to isolate issues and unexpected behaviors. Reproduce complex edge cases and support other DSP and RTL engineers...

Lugar: Hudson Valley, NY | 16/01/2026 00:01:38 AM | Salario: S/. $155900 - 230770 per year | Empresa: Marvell

Digital Design Engineer, Principal

Engineer, you will be at the forefront of innovation—driving micro-architecture and RTL development while spearheading HW/SW... and optimizing Verilog RTL, with expertise in Spyglass for thorough LINT and Clock Domain Crossing (CDC) checks to ensure flawless...

Lugar: Santa Clara, CA | 22/01/2026 21:01:14 PM | Salario: S/. $146850 - 220000 per year | Empresa: Marvell