and implementation for complex mixed-signal SOCs. This role requires deep expertise in memory BIST and TAP controller insertion at RTL... SoCs, including scan, MBIST, LBIST, and boundary scan. Lead RTL-level DFT insertion, scan chain insertion...
and validate DFT constraints, including DFT SDC, timing checks, and DFT-specific timing analysis. Collaborate with RTL design..., iJTAG, SSN, and IP-level DFT integration. Review RTL, synthesis, LEC, and physical design impacts on DFT implementation...
and timing closure. You will identify and fix timing in RTL to meet the frequency target. Work with the Verification team...
with RTL, synthesis, PnR, and verification teams to ensure end to end PCIe timing signoff. Analyze clocking, resets, CDC paths... to work with RTL, physical design, and DFT teams. Dheeraj Galav Senior Technical Recruiter Email: Address: 505...
of assertion(SVA/OVL) and coverage-based methodologies. Exposure to RTL design, software development, formal verification... components in SystemVerilog and UVM along with formal to achieve verification of the design. Coordinate with RTL engineers...
in our next-generation AI processor. You’ll collaborate with experts across architecture, RTL design, physical design, firmware...
with Unmanned Aerial Systems/Remote Piloted Vehicles. Experience with tools/skill sets to include: Software Defined Radios (RTL-SDR...
) to develop electronic warfare and radar systems Learn and apply FPGA design principles including RTL design, verification, logic...
expectations Required skills FPGA design experience including thorough design documentation, completion and review of RTL... blocks, participation in code reviews, significant RTL debug, and working knowledge of CDC, reset and clock design Ability...
's industry-leading products by driving physical design implementation for custom IP and SoC designs from RTL to GDS. As a domain...