Sr. Physical Design Engineer, Amazon Leo

into the U.S. as a refugee or granted asylum. Key job responsibilities Work with RTL/logic designers to drive architectural... through excellent collaboration and teamwork with other physical design engineers as well as with the RTL/Arch. Teams BASIC...

Lugar: Austin, TX | 02/11/2026 03:11:31 AM | Salario: S/. No Especificado | Empresa: Amazon

Litigation Legal Paralegal

in our next-generation AI processor. You’ll collaborate with experts across architecture, RTL design, physical design, firmware...

Lugar: Houston, TX | 02/11/2026 03:11:31 AM | Salario: S/. $150000 - 200000 per year

Senior System Power Architect

, and I/O, and correlate models with simulations and silicon Establish power-aware RTL methodology Develop power and competitive... expertise in RTL and gate-level power analysis and optimization, as well as power-aware synthesis and P&R Hands...

Lugar: San Jose, CA | 02/11/2026 03:11:31 AM | Salario: S/. No Especificado | Empresa: Lattice Semiconductor

Litigation Legal Paralegal

in our next-generation AI processor. You’ll collaborate with experts across architecture, RTL design, physical design, firmware...

Lugar: Dallas, TX | 02/11/2026 03:11:31 AM | Salario: S/. $150000 - 200000 per year

Hardware Engineers: RTL Implementation and Evaluation Workflows

What We're Researching We're running a paid study on modern hardware description workflows and RTL implementation... in a remote interview to walk us through your typical hardware design process. We will ask you to review specific RTL...

Lugar: USA | 01/11/2026 22:11:40 PM | Salario: S/. No Especificado | Empresa: Terac

Sr. Staff Design Engineer

atmosphere, then Lattice may well be just what you’re looking for. Job Description: Duties: Responsible for RTL design... FPGA RTL design, logic verification, debug and timing closure DDR protocols (e.g.: DDR3, DDR4, LPDDR4, DDR5) High-speed...

Lugar: San Jose, CA | 01/11/2026 19:11:28 PM | Salario: S/. No Especificado | Empresa: Lattice Semiconductor

ASIC/RTL Design Engineer 5

with analog circuit designers, RTL designers and verification engineers. Successful candidates will be responsible for leading... simulation failures and finding the root cause in the model, RTL or testbench Documenting model behavior, limitations...

Lugar: San Jose, CA | 01/11/2026 18:11:36 PM | Salario: S/. No Especificado | Empresa: American IT Systems

Analog Mixed-Signal SystemVerilog Modeling Engineer

closely with analog circuit designers, RTL designers, and verification engineers. The candidate will be responsible... cause in the model, RTL, or testbench. Documenting model behavior, limitations, and interfaces. EXPERIENCE AND EDUCATION...

Lugar: San Jose, CA | 01/11/2026 18:11:54 PM | Salario: S/. No Especificado | Empresa: Cynet Systems

VLSI Physical Design Engineer

We are seeking an experienced VLSI Physical Design Engineer with 6 9 years of hands-on experience in RTL-to-GDSII implementation... 1. RTL-to-GDSII Implementation Perform RTL-to-GDSII implementation using Synopsys Fusion Compiler. Execute synthesis...

Lugar: USA | 01/11/2026 18:11:29 PM | Salario: S/. No Especificado | Empresa: SoftPathTechnologies