Analog Layout Design engineer
work-experience in Cadence Virtuoso Layout Editor or Synopsys Custom-Compiler is highly preferred....
Lugar: USA | 01/06/2026 17:06:03 PM | Salario: S/. No Especificado | Empresa: Amaze Systems
Lead ASIC DFT Engineer
, JTAG, boundary scan, and silicon debug. Hands-on experience with Synopsys, Cadence, and Siemens/Mentor EDA tools. Proven...
Lugar: USA | 01/06/2026 17:06:24 PM | Salario: S/. No Especificado | Empresa: ITMC Systems, Inc
Design Verification Engineer - Viasat Government
, Synopsys, and/or Mentor) Foundational knowledge of digital logic and timing considerations Strong written and verbal...
Lugar: Marlborough, MA | 01/06/2026 02:06:03 AM | Salario: S/. No Especificado | Empresa: Viasat
Programmable Logic (PL) Engineer
, Intel/Altera Quartus, Siemens/Mentor Graphics, Synopsys Synplify, SoftCore Micro embedments in MicroChip, etc. Proven track...
Lugar: Carlsbad, CA | 31/05/2026 20:05:18 PM | Salario: S/. No Especificado | Empresa: Viasat
SoC Physical Design Engineer, Senior Member of Technical Staff (SMTS)
., Cadence Innovus/Tempus, Synopsys ICC2/PrimeTime, Siemens Calibre or equivalent). Experience with power intent and power...
Lugar: Folsom, CA | 31/05/2026 02:05:19 AM | Salario: S/. No Especificado | Empresa: Micron
Engineer, ASIC Physical Design
using Tempus (cadence) or Primetime (synopsys). 4\. Place and Route: Cadence tools (Innovus/Tempus) or Synopsys tools... (ICC2 or Fusion Compiler/Primetime). 5\. Physical verification: Mentor tools (Calibre) or Synopsys tools (IC Validator...
Lugar: Minneapolis, MN | 31/05/2026 01:05:18 AM | Salario: S/. $142506.02 - 176000 per year | Empresa: Micron
Physical Design Engineer
from Synopsys (ICC2/DC/PT/STAR/ICV), Cadence (Genus/Innovus/Tempus) and other major EDA companies. Confirmed prior experience...
Lugar: Westford, MA | 31/05/2026 01:05:09 AM | Salario: S/. $116000 - 189750 per year | Empresa: Nvidia
EDA License Engineer
scheduling allocation such as License Scheduler. Experience supporting EDA toolchains (e.g., Synopsys, Cadence, Siemens...
Lugar: Santa Clara, CA | 30/05/2026 21:05:46 PM | Salario: S/. No Especificado | Empresa: Nvidia
Design Verification Engineer - Viasat Government
Experience with industry standard EDA tools (Cadence, Synopsys, and/or Mentor) Foundational knowledge of digital logic...
Lugar: Carlsbad, CA - Marlborough, MA | 30/05/2026 20:05:29 PM | Salario: S/. No Especificado | Empresa: Viasat
Principal Signoff CAD Engineer
tools (Synopsys StarRC and/or Cadence Pegasus) and static timing analysis tools (Synopsys PrimeTime and/or Cadence Tempus...) in advanced process nodes (5nm and below). 10+ years of familiarity with physical design implementation tools (Synopsys Fusion...
Lugar: Mountain View, CA | 30/05/2026 19:05:44 PM | Salario: S/. No Especificado | Empresa: Microsoft