Principal ASIC Design Engineer

. ### Synthesis & Timing Execute logic synthesis (Synopsys Design Compiler or Cadence Genus) and drive optimization toward PPA... practices Hands-on experience with logic synthesis (Design Compiler or Genus) and static timing analysis (PrimeTime or Tempus...

Lugar: Boise, ID | 25/09/2026 22:09:08 PM | Salario: S/. No Especificado | Empresa: Micron

Digital Design Engineer

Innovus are required;RTL-to-GDS flow, area optimization, and DRC/LVS error resolution;digital synthesis using Cadence Genus... and Python automation;constraint creation and synthesis of mobile phone digital circuit designs with Cadence Genus, Conformal...

Lugar: Chandler, AZ | 25/09/2026 17:09:13 PM | Salario: S/. No Especificado | Empresa: Qorvo

Principal Digital Engineer

below: Simulation – Mentor ModelSim, Cadence Xcelium, Incisive or Synopsys VCS - Synthesis – Synopsys Design Compiler, Cadence Genus...

Lugar: Linthicum, MD | 24/09/2026 17:09:41 PM | Salario: S/. $119600 - 179400 per year | Empresa: Northrop Grumman

Postdoctoral Research Associate

on a research project focused on Sansevieria, a plant genus for which phylogenetic and genomic resources are scarce. The candidate..., also in relation to the sister genus Dracaena. The project foresees to establish a reference genome assembly for one focal species...

Lugar: Tucson, AZ | 15/09/2026 22:09:23 PM | Salario: S/. No Especificado | Empresa: University of Arizona