Senior Synthesis Engineer

Compiler/Genus), Fair knowledge in LEC, LP signoff tools Proficient in VLSI front end design steps- Verilog/VHDL, Synthesis...

Lugar: Austin, TX | 26/06/2026 00:06:24 AM | Salario: S/. $115600 - 173400 per year | Empresa: Qualcomm

Lead ASIC Design Engineer

: Drive logic synthesis (e.g., Design Compiler, Genus), Static Timing Analysis (STA via PrimeTime/Tempus), and run static...

Lugar: San Jose, CA | 20/06/2026 19:06:07 PM | Salario: S/. No Especificado | Empresa: Broadcom

Principal Product Engineer, Synthesis

products. Job responsibilities: Perform Product Engineering work for Genus Synthesis Solution (Genus), a logic synthesis..., Performance & Area (PPA) for latest digital ASICs Understand the internal flow within the Genus for newly developed features...

Lugar: San Jose, CA | 17/06/2026 01:06:57 AM | Salario: S/. No Especificado | Empresa: Cadence Design Systems

Principal Engineer, Digital Design Engineer (AI/ML)

(Genus), STA and power analysis (Tempus), and logical equivalence checking (Conformal) Lead architecture and design reviews..., BIST), and clock domain crossing methodologies Proficiency with Cadence digital design tools: Genus, Innovus, Tempus, Conformal...

Lugar: Chandler, AZ | 13/06/2026 02:06:55 AM | Salario: S/. No Especificado | Empresa: Analog Devices