Static Timing Analysis (STA) Engineer

(or Cadence Tempus) for timing analysis and Synopsys Design Compiler (or Cadence Genus) for synthesis Ability to work with large...

Lugar: Tukwila, WA | 21/07/2026 17:07:58 PM | Salario: S/. $146200 - 197800 per year | Empresa: Boeing

STA Engineer

designs, UPF). Hands‑on experience with: Synopsys Prime Time Synopsys Design Compiler / Cadence Genus Preferred...

Lugar: Santa Clara, CA | 08/07/2026 20:07:53 PM | Salario: S/. No Especificado | Empresa: Qualcomm