synthesis issues and STA Generate clean netlist. What we are looking for Experience: 8–12 years of hands-on RTL Synthesis...
, and embedded systems Perform and support digital circuit analysis throughout various stages of the design lifecycle (RTL, netlist...
-power CPUs, GPUs, SoCs at block level, cluster level, and/or full chip level, with a focus on netlist-related aspects... such as equivalence checking, asynchronous checking including clock domain crossing checks and MTBF analysis, logic synthesis, netlist...
issues. Waveform & Silicon Analysis: Collect and analyze waveforms, run analog simulations, and review RTL/netlist...
convergence for advanced technology nodes. Key Responsibilities Drive block-level physical design implementation from netlist...
. Meet specifications for high-speed interfaces such as HBM, DDR, PCIe and SerDes. Netlist management for heterogeneous...
, Linux/Unix shell. This individual will design, verify, and deliver complex Physical Design solutions from netlist...
, timing closure, lower power implementation and netlist quality check with RTL designer and PD team. Work on SDC development...
implementation of FPGA/SoC designs, working with experienced engineers across the backend design flow from netlist through physical...
best known design and verification practices and communicate them to the department Perform RTL and synthesized netlist (gate... level) verification at block, subsystem, and fullchip level Facilitate netlist bring up to achieve basic functionality...