Litigation Legal Paralegal

in our next-generation AI processor. You’ll collaborate with experts across architecture, RTL design, physical design, firmware...

Lugar: Houston, TX | 02/11/2026 02:11:43 AM | Salario: S/. $150000 - 200000 per year

Senior System Power Architect

, and I/O, and correlate models with simulations and silicon Establish power-aware RTL methodology Develop power and competitive... expertise in RTL and gate-level power analysis and optimization, as well as power-aware synthesis and P&R Hands...

Lugar: San Jose, CA | 02/11/2026 02:11:43 AM | Salario: S/. No Especificado | Empresa: Lattice Semiconductor

Litigation Legal Paralegal

in our next-generation AI processor. You’ll collaborate with experts across architecture, RTL design, physical design, firmware...

Lugar: Dallas, TX | 02/11/2026 02:11:43 AM | Salario: S/. $150000 - 200000 per year

Sr. Staff Design Engineer

atmosphere, then Lattice may well be just what you’re looking for. Job Description: Duties: Responsible for RTL design... FPGA RTL design, logic verification, debug and timing closure DDR protocols (e.g.: DDR3, DDR4, LPDDR4, DDR5) High-speed...

Lugar: San Jose, CA | 01/11/2026 19:11:28 PM | Salario: S/. No Especificado | Empresa: Lattice Semiconductor

Analog Mixed-Signal SystemVerilog Modeling Engineer

closely with analog circuit designers, RTL designers, and verification engineers. The candidate will be responsible... cause in the model, RTL, or testbench. Documenting model behavior, limitations, and interfaces. EXPERIENCE AND EDUCATION...

Lugar: San Jose, CA | 01/11/2026 18:11:54 PM | Salario: S/. No Especificado | Empresa: Cynet Systems

VLSI Physical Design Engineer

We are seeking an experienced VLSI Physical Design Engineer with 6 9 years of hands-on experience in RTL-to-GDSII implementation... 1. RTL-to-GDSII Implementation Perform RTL-to-GDSII implementation using Synopsys Fusion Compiler. Execute synthesis...

Lugar: USA | 01/11/2026 18:11:29 PM | Salario: S/. No Especificado | Empresa: SoftPathTechnologies

FPGA Engineer

having below skills Strong Verilog HDL and RTL design expertise. Good knowledge of CDC, reset design, pipelining, FIFO...

Lugar: Raleigh, NC | 01/11/2026 18:11:51 PM | Salario: S/. No Especificado | Empresa: Veridian Tech

VLSI Physical Designer

Design: Provides services in transforming the RTL design into a physical layout of the chip using Synopsys Fusion Compiler... such as 5nm and 3nm. RTL to GDSII: Synthesis, Placement and Routing using Fusion Compiler Block and SOC Floor planning using...

Lugar: USA | 01/11/2026 18:11:10 PM | Salario: S/. No Especificado | Empresa: SoftPathTechnologies

FPGA Engineer

of 5-7 Years FPGA Engineers having below skills Strong Verilog HDL and RTL design expertise. Good knowledge of CDC...

Lugar: Raleigh, NC | 01/11/2026 18:11:09 PM | Salario: S/. No Especificado | Empresa: Amaze Systems
«Anterior12345678910