FPGA Development Tools Engineer – Synthesis

of FPGA compilation technology. In this role, you will develop and enhance synthesis capabilities that transform RTL designs... strong expertise in RTL design and synthesis, combined with a solid software engineering background and a passion for building scalable...

Lugar: San Jose, CA | 04/06/2026 18:06:21 PM | Salario: S/. No Especificado | Empresa: Altera

Agentic AI Engineer

, and tool-calling specs that feed Cadence agents the right design context (RTL, scripts, logs, reports, methodology docs) at the... Pipelines. Curate, clean, and label datasets from EDA artifacts (RTL, waveforms, logs, reports, schematics). Build synthetic...

Lugar: USA | 04/06/2026 18:06:10 PM | Salario: S/. No Especificado | Empresa: Cadence Design Systems

DFT Engineers

understanding of clock DFT and clock verification concepts Strong grasp of digital design and RTL fundamentals Experience...

Lugar: Santa Clara, CA | 04/06/2026 17:06:21 PM | Salario: S/. No Especificado | Empresa: Intellectt

DFT Engineers

validation Solid understanding of clock DFT and clock verification concepts Strong grasp of digital design and RTL...

Lugar: Santa Clara, CA | 04/06/2026 17:06:43 PM | Salario: S/. No Especificado | Empresa: E-Solutions

Senior FPGA Engineer

, and validate FPGA architectures for high-reliability embedded systems Develop RTL code using VHDL and/or Verilog/SystemVerilog...

Lugar: El Segundo, CA | 04/06/2026 17:06:00 PM | Salario: S/. No Especificado | Empresa: ITResource Hunter

Design Verification Engineer

with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a hands-on role with high... simulations, triage failures, drive root-cause analysis, and collaborate with RTL designers to resolve issues. Implement...

Lugar: USA | 04/06/2026 17:06:22 PM | Salario: S/. No Especificado | Empresa: Veridian Tech

Lead ASIC DFT Engineer

timing analysis. Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to resolve..., and diagnosis/debug. Work on JTAG, boundary scan, iJTAG, SSN, and IP-level DFT integration. Review RTL, synthesis, LEC...

Lugar: USA | 04/06/2026 17:06:23 PM | Salario: S/. No Especificado | Empresa: ITMC Systems, Inc