FPGA Engineer

across projects. This will require expertise in FPGA design, signal processing, RTL development (SystemVerilog/VHDL), and Altera... expertise in RTL design using SystemVerilog and/or VHDL Demonstrated experience with Altera FPGA devices and development tools...

Lugar: Fort Collins, CO - Broomfield, CO | 01/11/2026 18:11:51 PM | Salario: S/. $144000 - 192000 per year | Empresa: Anduril Industries

Principal ASIC/SoC Design Engineer

’s components. RTL Design and Synthesis: - Use Synopsys Design Compiler to create RTL (Register Transfer Level) designs.... - Optimize RTL code for area, power, and performance. - Implement and verify complex digital blocks. Constraint Development...

Lugar: Minneapolis, MN | 01/11/2026 03:11:57 AM | Salario: S/. No Especificado | Empresa: Chelsea Search Group

Senior Digital Design Engineer

the trade-off analysis for implementation, and deliver high performance, area and power efficient RTL Blocks. Craft... micro-architecture specification, implement in high-quality RTL, and deliver a fully verified, synthesis and timing clean...

Lugar: Santa Clara, CA | 01/11/2026 02:11:12 AM | Salario: S/. No Especificado | Empresa: Nvidia