for RTL and gate-level power analysis and optimization. You will work closely with leading semiconductor customers to drive... Collaborate with R&D and Product teams to influence product enhancements Qualifications Required: Strong RTL design...
closely with RTL and physical designers across multiple sites to optimize power, performance, area, and schedule. Solve... Verilog RTL and make minor modifications for timing or power. Knowledge of digital circuits, high speed flops, synchronizers...
track record of shipping designs or product improvements. â–¸ Expert-level understanding of the full RTL-to-GDSII flow... to Have â–¸ Experience with Cadence Joules RTL Power Solution, Voltus IC Power Integrity, or Innovus-Tempus integrated signoff flows...
). Experience with simulation tools (Active HDL/QuestaSim). Must be knowledgeable in VHDL and/or Verilog RTL coding. Knowledge...
with RTL, physical design, timing, and verification teams to ensure the clock architecture is correctly modeled and implemented... the full-chip CDC architecture plan: identify, classify, and document every asynchronous clock domain crossing from RTL...
your career. THE ROLE: As a Silicon Design Engineer, you will collaborate with RTL and Verification engineers to improve... with RTL and Verification teams to improve build, simulation, and release processes Develop and maintain automation to improve...
coverage tracking, and functional coverage tracking Testbench development for the verification of RTL blocks using VHDL... to start date RTL coding and simulation in VHDL or Verilog Testbench development for the verification of RTL blocks using...
-architecture, RTL, and physical design starting with specification. Using AI agents to process large data and existing codebase..., evaluation frameworks to measure agent accuracy. Experience with System Verilog, RTL and hardware description language...
for FPGA designs. Create detailed RTL (VHDL/Verilog/SystemVerilog) and accompanying constraints to meet timing, power...
for data analysis & insights. Good exposure to multi-functional areas including RTL & clocks design, STA, place-n-route...