DFT (Design For Test) Engineer

practices. Proficiency in System Verilog and fluency with industry-standard EDA tools (e.g., Synopsys DFT Compiler, Cadence...

Lugar: San Jose, CA | 07/11/2026 03:11:44 AM | Salario: S/. No Especificado | Empresa: Etched

Assembly Design Kit (ADK) Engineer

and automate verification flows using advanced scripting, integrating tools from Synopsys, Cadence, and Siemens EDA to enhance... Proficiency: Extensive experience with industry-standard sign-off tools from multiple vendors such as Synopsys (IC Validator...

Lugar: San Jose, CA | 07/11/2026 03:11:29 AM | Salario: S/. $105000 - 160000 per year | Empresa: SK hynix America

Emulation Engineer, Hardware Prototyping (HAPS)

, Firmware, and Software — plus direct partnership with Synopsys on tool issues and platform capability. Representative... with ProtoCompiler, Vivado, or Synopsys prototyping flows. Firmware, driver, or bootloader bring-up experience on pre-silicon platforms...

Lugar: San Jose, CA | 07/11/2026 03:11:33 AM | Salario: S/. No Especificado | Empresa: Etched

EDA Engineer (RFIC Engineering)

flow, such as Cadence Virtuoso/Spectre, Siemens Calibre, Synopsys/Cadence digital tools, Keysight ADS, EMX/HFSS, or similar..., techfiles, display resources, or analog/RF/mixed-signal design flows Experience with Siemens Calibre DRC/LVS/PEX/xRC, Synopsys...

Lugar: Irvine, CA | 07/11/2026 03:11:00 AM | Salario: S/. $125000 - 150000 per year | Empresa: SpaceX