Senior ASIC & FPGA Design Engineer

) and UltraScale design methodology Experience with FPGA simulation tools such as Synopsys VCS Strong understanding of digital... oscilloscopes, spectrum analyzers, and signal generators Familiarity with Synopsys EDA tools Must be a US Citizen...

Lugar: Grand Prairie, TX | 05/11/2026 22:11:23 PM | Salario: S/. $98100 - 182100 per year | Empresa: Lockheed Martin

Sr. Financial Planning & Analysis

At-Synopsys,-we-want-talented-people-of-every-background-to-feel-valued-and-supported-to-do-their-best-work.-Synopsys...);" In-addition-to-the-base-salary,-this-role-may-be-eligible-for-an-annual-bonus,-equity,-and-other-discretionary-bonuses.-Synopsys...

Lugar: Hillsboro, OR | 05/11/2026 21:11:17 PM | Salario: S/. $116000 - 174000 per year | Empresa: Synopsys

ASIC Chip Lead and Design Engineer (remote)

’s components. RTL Design and Synthesis: - Use Synopsys Design Compiler to create RTL (Register Transfer Level) designs.../MSEE or equivalent 10+ years of direct industry experience with ASIC and/or SoC design. Proficiency in Synopsys Design...

Lugar: Hillsboro, OR | 05/11/2026 21:11:17 PM | Salario: S/. No Especificado | Empresa: Chelsea Search Group

EDA Tools Software Engineer

technologies. The team owns PDK and related EMIR enablement and supports multiple EDA platforms including Synopsys Totem/Totem-SC... where appropriate. Partner with Synopsys, Cadence and internal engineering teams to resolve tool limitations, qualify new releases...

Lugar: Chandler, AZ | 05/11/2026 21:11:23 PM | Salario: S/. No Especificado | Empresa: Intel

Silicon Validation Lead, Principal Engineer

At-Synopsys,-we-want-talented-people-of-every-background-to-feel-valued-and-supported-to-do-their-best-work.-Synopsys...);" In-addition-to-the-base-salary,-this-role-may-be-eligible-for-an-annual-bonus,-equity,-and-other-discretionary-bonuses.-Synopsys...

Lugar: Sunnyvale, CA | 05/11/2026 21:11:58 PM | Salario: S/. No Especificado | Empresa: Synopsys

ASIC Chip Lead and Design Engineer (remote)

’s components. RTL Design and Synthesis: - Use Synopsys Design Compiler to create RTL (Register Transfer Level) designs.../MSEE or equivalent 10+ years of direct industry experience with ASIC and/or SoC design. Proficiency in Synopsys Design...

Lugar: Orlando, FL | 05/11/2026 19:11:36 PM | Salario: S/. No Especificado | Empresa: Chelsea Search Group

ASIC Chip Lead and Design Engineer (remote)

’s components. RTL Design and Synthesis: - Use Synopsys Design Compiler to create RTL (Register Transfer Level) designs.../MSEE or equivalent 10+ years of direct industry experience with ASIC and/or SoC design. Proficiency in Synopsys Design...

Lugar: Dallas, TX | 05/11/2026 19:11:54 PM | Salario: S/. No Especificado | Empresa: Chelsea Search Group