Senior Digital ASIC Design Engineer
in Cadence, Synopsys, Siemens, or similar CAD/EDA environments Work closely with physical design and analog/mixed-signal teams...
in Cadence, Synopsys, Siemens, or similar CAD/EDA environments Work closely with physical design and analog/mixed-signal teams...
with x86 preferred, strong ASM skills a bonus- Familiarity with version control software (GIT). Experience with Synopsys...
, verification, and physical implementation. Proficiency with tools such as Cadence, Synopsys, Mentor Graphics, and scripting... languages like Tcl, Perl, Python. Synopsys ICV is required, and Mentor Calibre svrf / tvf is preferred Design Flow: Strong...
: Cadence, Synopsys, Siemens, Xilinx Vivado, Altera Quartus, Questa, Modelsim, Icarus Verilog, Verilator, etc. Ability to work...
and debug tools (e.g., Synopsys, Cadence, oscilloscopes, logic analyzers, simulation environments) Strong attention to detail...
(e.g., Synopsys, Mentor Graphics). 3+ years of experience with FPGA verification using VUnit. Digital subsystem, ASIC...
with industry-standard tools (e.g. Synopsys, Mentor Graphics). Knowledge and hands-on experience with VUnit. Digital subsystem...
, build and verification tools (VCS or equivalent simulation tools, debug tools like Verdi, Synopsys). A solid understanding...
Experience with Cadence (Innovus, Genus) or Synopsys ( Fusion Compiler) automated RTL-to-GDSII flows Experience with PPA tuning...
such as: o Synopsys Fusion Compiler / ICC2 o PrimeTime o Cadence Innovus (optional) o RedHawk / Voltus (EMIR) Good understanding...