Senior ASIC Verification Engineer

-leading simulation tools (e.g., Cadence Xcelium, Synopsys VCS, Mentor Questa) and debug waveforms to validate design... simulation tools (e.g., Cadence Xcelium, Synopsys VCS, Mentor Questa) and waveform debugging. Preferred Skills and Experience...

Lugar: Sunnyvale, CA | 12/08/2026 20:08:54 PM | Salario: S/. No Especificado | Empresa: Hewlett Packard Enterprise

Emulation Front-End Infrastructure Engineer

tools, including Synopsys Design Compiler, ZeBu Compiler, and Cadence HDL-ICE. Strong automation and scripting skills... with Synopsys Design Compiler, ZeBu Compiler, and Cadence HDL-ICE. Experience building scalable regression, reporting, monitoring...

Lugar: Santa Clara, CA | 11/08/2026 19:08:15 PM | Salario: S/. No Especificado | Empresa: Nvidia

Physical Design (Multiple levels)

/SoC Physical Design implementation. Place and Route using Cadence Innovus and/or Synopsys Fusion Compiler. Static Timing... Analysis and timing closure using Synopsys PrimeTime SI. Physical verification and design sign-off methodologies. Formal...

Lugar: San Diego, CA | 10/08/2026 20:08:26 PM | Salario: S/. $115600 - 173400 per year | Empresa: Qualcomm

Senior Physical Design Engineer

industry-standard physical design EDA tools such as Synopsys Fusion Compiler, ICC2, PrimeTime, Cadence Innovus, or equivalent...

Lugar: San Jose, CA | 10/08/2026 01:08:34 AM | Salario: S/. $133200 - 192825 per year | Empresa: Altera

FPGA Engineer

communication protocols. · Familiarity with other synthesis and simulation environments (Synopsys, Aldec). Physical Demands...

Lugar: Albuquerque, NM | 09/08/2026 18:08:37 PM | Salario: S/. $88500 - 135000 per year | Empresa: AeroVironment