Sr. Package Layout Engineer, Annapurna Labs - AI Silicon Packaging
or silicon interposers - Hands-on expertise with package layout tools such as Cadence APD/SiP, Synopsys IC Packaging, Mentor...
or silicon interposers - Hands-on expertise with package layout tools such as Cadence APD/SiP, Synopsys IC Packaging, Mentor...
and languages such as Synopsys VCS and SystemVerilog -Strong understanding of digital design principles, including timing analysis...
simulation tools (e.g., Synopsys, Silvaco), finite element modelling (COMSOL), and / or compact models generation Recent...
of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Perform Synopsys HAPs pre... for address/data levelling to get to maximum design speed as per specification. Work with Synopsys for ARC CPU bring up in ASIC...
analysis (STA) Hands-on experience with RTL linting and CDC tools — Synopsys SpyGlass and its peers Bonus points if you bring..., or Synopsys Comfort with Git and Linux environments Who Thrives Here You're curious. You chase problems down until they're...
simulation tools (e.g., Synopsys, Silvaco), finite element modelling (COMSOL), and / or compact models generation Recent...
and frontend CAD architectures across global organizations Lint-First Champion — Expert command of SpyGlass and Synopsys VC...
and prepare PIC layouts using industry-standard PIC design flows including: Synopsys OptoCompiler Cadence Virtuoso-based...
and maintain integrations between AI systems and industry-standard EDA tools (e.g., Synopsys, Cadence, Siemens EDA/Questa). Work... SystemVerilog and UVM. Hands-on experience with industry-standard EDA tools such as Synopsys and Cadence. Proficiency in Python...
with industry standard EDA tools, such as Cadence Virtuoso, PVS, Spectre, Innovus, Skipper, Siemens Calibre, Synopsys Hspice, Design...