HBM SoC Physical Design Engineer

logic/base die designs from netlist to GDSII. You will work closely with RTL design, verification, DFT, IP providers... from netlist to GDSII on advanced nodes and complex designs. Proficiency with industry EDA tools (e.g., Cadence Innovus/Tempus...

Lugar: Richardson, TX | 26/03/2026 03:03:58 AM | Salario: S/. No Especificado | Empresa: Micron

Design Engineer

in 2nm/3nm/5nm technology nodes . The person should have hands on experience on netlist- gds implementation of multimillion...

Lugar: San Jose, CA | 26/03/2026 01:03:00 AM | Salario: S/. $120000 - 192000 per year | Empresa: Broadcom

Staff Design Engineer

and verification practices and communicate them to the department Perform RTL and synthesized netlist (gate level) verification... at block, subsystem, and full chip level Facilitate netlist bring up to achieve basic functionality Responsible...

Lugar: San Jose, CA | 25/03/2026 18:03:28 PM | Salario: S/. $116000 - 246000 per year | Empresa: Micron

Human Resources Assistant

Human Resources Assistant Company Overview: Netlist Inc. (NASDAQ: NLST) is a leading provider of high-performance...

Lugar: Irvine, CA | 24/03/2026 18:03:07 PM | Salario: S/. $25 - 30 per hour | Empresa: Netlist

Senior Design Engineer

best known design and verification practices and communicate them to the department Perform RTL and synthesized netlist (gate... level) verification at block, subsystem, and fullchip level Facilitate netlist bring up to achieve basic functionality...

Lugar: San Jose, CA | 22/03/2026 00:03:57 AM | Salario: S/. $93000 - 198000 per year | Empresa: Micron

Design Engineer

such as Python, Tcl, and SystemVerilog. Responsibilities: Perform PPA optimization with Fusion compiler. Conduct RTL and netlist...

Lugar: Sunnyvale, CA | 22/03/2026 00:03:17 AM | Salario: S/. No Especificado | Empresa: Aditi Consulting