Senior Electrical Engineer - ASIC/FPGA (Hybrid)

/ FPGA digital architecture and design using RTL, timing closure, verification, and system integration Recommend new tools... and must meet eligibility requirements RTL coding and simulation in Verilog or VHDL Digital circuit architecture, design, resource...

Lugar: Salt Lake City, UT | 30/01/2026 00:01:45 AM | Salario: S/. $86800 - 165200 per year | Empresa: Raytheon Technologies

Physical Design Applications Engineer

optimization, and robust RTL-to-GDS flows using Synopsys tools. You Are You are an ASIC/physical design engineer with 2-4 years... of hands-on experience in digital implementation flows. You understand full RTL-to-GDS design flows and are comfortable...

Lugar: Sunnyvale, CA | 30/01/2026 00:01:31 AM | Salario: S/. No Especificado | Empresa: Synopsys

Infinity Fabric Verification Engineer

Build the directed and random verification tests Debug test failures to determine the root cause;work with RTL... verification Proficient in debugging firmware and RTL code using simulation tools Proficient in using UVM testbenches and working...

Lugar: Santa Clara, CA | 29/01/2026 23:01:06 PM | Salario: S/. No Especificado | Empresa: Advanced Micro Devices

Senior React Developer

(unit, integration, E2E) with Jest/RTL/Enzyme;CI integration. , Proficiency with Git and common workflows;comfort...

Lugar: California | 29/01/2026 23:01:22 PM | Salario: S/. $55 - 63 per hour | Empresa: Tech One IT

R&D Engineer, Sr Staff

in chip design. Mapping RTL designs into FPGA environments, leveraging deep verification and implementation knowledge...

Lugar: Sunnyvale, CA | 29/01/2026 22:01:33 PM | Salario: S/. No Especificado | Empresa: Synopsys