ASIC DFT Engineer

, and DFT-specific timing analysis. Collaborate with RTL design, verification, physical design, STA, and silicon validation.... Review RTL, synthesis, LEC, and physical design impacts on DFT implementation and test quality. Act as a technical...

Lugar: Plano, TX | 29/06/2026 17:06:35 PM | Salario: S/. No Especificado | Empresa: Purple Hires Inc

Lead ASIC DFT (Design-for-Test) Engineer - Remote

, and DFT-specific timing analysis. Collaborate with RTL design, verification, physical design, STA, and silicon validation.... Review RTL, synthesis, LEC, and physical design impacts on DFT implementation and test quality. Act as a technical...

Lugar: USA | 29/06/2026 17:06:27 PM | Salario: S/. No Especificado | Empresa: Saransh Inc

Design Verification Engineer (ASIC/SoC verification) - Remote

with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. Qualifications: B.S. or M... simulations, triage failures, drive root-cause analysis, and collaborate with RTL designers to resolve issues. Implement...

Lugar: USA | 29/06/2026 17:06:04 PM | Salario: S/. No Especificado | Empresa: Saransh Inc

Design Verification Engineer

approach, contribute to methodology, and work closely with architecture, RTL design, DFT, firmware, physical design... with RTL designers to resolve issues. Implement and maintain functional coverage, code coverage, assertion coverage...

Lugar: Plano, TX | 29/06/2026 17:06:41 PM | Salario: S/. No Especificado | Empresa: Purple Hires Inc

Emulation Engineer

skills across RTL, testbench, and firmware. Knowledge of PCIe/AXI/DDR or similar standard protocols. Experience with Linux... platforms. Port RTL/UVM testbenches from simulation to emulation. Debug SoC/IP level issues in emulation and provide root...

Lugar: San Jose, CA | 29/06/2026 17:06:50 PM | Salario: S/. $55 - 60 per hour | Empresa: Cynet Systems