Design Validation & Test (DVT) Engineer

closely with Architecture, RTL Design, Firmware, Systems, Product Engineering, and customers to solve complex silicon... complex hardware, firmware, RTL, and system-level issues while working closely with cross-functional engineering teams...

Lugar: Irvine, CA | 31/10/2026 23:10:38 PM | Salario: S/. No Especificado | Empresa: Celero Communications, Inc.

Senior ASIC Design Engineer - Agentic AI

that will help the ASIC team implement high performance, area and power efficient RTL to achieve design targets and specifications... RTL, and deliver a fully verified, synthesis/timing clean design. Collaborate and coordinate with other designers...

Lugar: Santa Clara, CA | 31/10/2026 22:10:07 PM | Salario: S/. No Especificado | Empresa: Nvidia

Principal ASIC/SoC Architect & Design Engineer

’s components. RTL Design and Synthesis: - Use Synopsys Design Compiler to create RTL (Register Transfer Level) designs.... - Optimize RTL code for area, power, and performance. - Implement and verify complex digital blocks. Constraint Development...

Lugar: Minneapolis, MN | 31/10/2026 22:10:02 PM | Salario: S/. No Especificado | Empresa: Chelsea Search Group

ASIC Chip Lead and Design Engineer

’s components. RTL Design and Synthesis: - Use Synopsys Design Compiler to create RTL (Register Transfer Level) designs.... - Optimize RTL code for area, power, and performance. - Implement and verify complex digital blocks. Constraint Development...

Lugar: Minneapolis, MN | 31/10/2026 22:10:25 PM | Salario: S/. No Especificado | Empresa: Chelsea Search Group

Senior Digital Design Engineer

the trade-off analysis for implementation, and deliver high performance, area and power efficient RTL Blocks. Craft... micro-architecture specification, implement in high-quality RTL, and deliver a fully verified, synthesis and timing clean...

Lugar: Santa Clara, CA | 31/10/2026 22:10:24 PM | Salario: S/. No Especificado | Empresa: Nvidia