NoC Interconnect Design Engineer and Architect

and analysis effort to final RTL delivery to the SoCs. One aspect of the process is to identify architecture bottlenecks and drive... components specifications as well as analyzing the performance results, deliver RTL and run tool flows. Responsibilities...

Lugar: San Diego, CA | 31/10/2026 22:10:48 PM | Salario: S/. $121800 - 182600 per year | Empresa: Qualcomm

IC Design Engineer (STA/ Synthesis)

) Strong understanding of ASIC design flows, including RTL and place-and-route. Excellent problem-solving skills and attention... environment. Direct or indirect experience with RTL/ Design is a plus At a minimum Bachelors and 12+ years of related experience...

Lugar: San Jose, CA | 31/10/2026 21:10:21 PM | Salario: S/. No Especificado | Empresa: Broadcom

Senior Logic Design Engineer, Cache Coherent Interconnects

, focusing on such tasks as micro-architectural definition, RTL coding, logic debug, synthesis and timing closure, supporting... performance and low power RTL, Synthesis and Timing closure, and design documentation. Collaborate with our verification team...

Lugar: Santa Clara, CA | 31/10/2026 21:10:36 PM | Salario: S/. No Especificado | Empresa: Nvidia