Design/DSP/Verification Intern - Bachelor's Degree

timing diagrams Implement block level design using RTL Coding guidelines Run Synthesis and Lint flow to ensure timing... simulation or emulation platforms Hands-on experience with RTL integration and bring-up system Experience with debugging...

Lugar: Santa Clara, CA | 18/12/2025 19:12:13 PM | Salario: S/. $27 - 53 per hour | Empresa: Marvell

Senior Circuit Design Engineer

clocking, and power management solutions. Drive the design and physical implementation of custom digital IPs from RTL..., etc..) is a plus. Experience with RTL, logic synthesis and verification is a plus. Mixed signal circuit design experience...

Lugar: Santa Clara, CA | 18/12/2025 18:12:31 PM | Salario: S/. No Especificado | Empresa: Nvidia

SERDES Micro Architect

with expertise in high-speed SerDes RTL design. You have had significant success driving architecture and product requirements... SerDes IPs. THE PERSON: If you have a keen interest in high-speed SerDes and digital RTL design, excel in teamwork...

Lugar: San Jose, CA | 18/12/2025 00:12:46 AM | Salario: S/. No Especificado | Empresa: Advanced Micro Devices

Physical IC Design Engineer

, this position will require in-depth knowledge and expertise in all Physical Design aspects of taking RTL to silicon tape-out..., and Timing Closure Setup and Synthesizing RTL Timing closure through various methods and strategies;preferable in-depth...

Lugar: San Jose, CA | 17/12/2025 23:12:58 PM | Salario: S/. No Especificado | Empresa: Broadcom