with RTL and optical team. Ensures all operating policies and procedures are followed at the highest level to include...
analysis Experience using Cadence verification tools such as VCS, Verdi, and Spyglass Experience writing and debugging RTL...
, RTL/gate level simulations & silicon debugging scripting for various IC design tasks such as STA, equivalency checks... and problem solving skills as well as hands-on lab debugging experiences Good knowledge of RTL simulation and synthesis...
analysis Experience using Cadence verification tools such as VCS, Verdi, and Spyglass Experience writing and debugging RTL...
analysis Experience using Cadence verification tools such as VCS, Verdi, and Spyglass Experience writing and debugging RTL...
analysis Experience using Cadence verification tools such as VCS, Verdi, and Spyglass Experience writing and debugging RTL...
, LLC **Req ID:** 18884 **Employer Description:** PREM\_RTL\_SERV\_EMP\_DESC...
Description:** PREM\_RTL\_SERV\_EMP\_DESC...
analysis Experience using Cadence verification tools such as VCS, Verdi, and Spyglass Experience writing and debugging RTL...
design document, timing constraint file ï‚· RTL coding, Lint checks, CDC, Synthesis, Equivalency checking, STA, RTL/gate... experiences ï‚· Good knowledge of RTL simulation and synthesis. ï‚· In-depth knowledge for design for low power and design...