Senior SoC Power Architect

(RTL, PD, Circuit, SI, Thermal, SW, Platform, Operations, Marketing, etc...) to deliver outstanding power solutions...

Lugar: Santa Clara, CA | 20/11/2025 18:11:11 PM | Salario: S/. No Especificado | Empresa: Nvidia

Sr. ASIC Design Engineer (Silicon Engineering)

, performance requirements and system limitations Define micro-architecture, implement the RTL in Verilog/System Verilog, integrate... in RTL implementation PREFERRED SKILLS AND EXPERIENCE: Ability to solve complex problems including clock domain...

Lugar: USA | 20/11/2025 18:11:21 PM | Salario: S/. No Especificado | Empresa: SpaceX

SoC Design Engineer

Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis...

Lugar: Santa Clara, CA | 20/11/2025 18:11:34 PM | Salario: S/. $110600 - 140000 per year | Empresa: OmniVision

Chip Integration Engineer

successful candidate will be responsible for various key tasks in the areas of chip integration and RTL design of cutting-edge network.... 5). Develop Verilog RTL. design verification support, logic synthesis, physical implementation constraints, static...

Lugar: San Jose, CA | 19/11/2025 19:11:30 PM | Salario: S/. $120000 - 192000 per year | Empresa: Broadcom

Physical Design Engineer

experience - Work closely with RTL & DFT designers - Strong TCL/Python scripting knowledge required, Perl is a plus. - Good...

Lugar: San Jose, CA | 19/11/2025 19:11:46 PM | Salario: S/. $120000 - 192000 per year | Empresa: Broadcom

DSP Engineer (Starship Avionics)

performance Support FPGA designers with bit-accurate and cycle-accurate RTL verification Own the end-to-end results... with verification between simulation and RTL FPGA implementation Experience modeling RF and channel impairments such as multipath...

Lugar: USA | 19/11/2025 18:11:14 PM | Salario: S/. $120000 - 145000 per year | Empresa: SpaceX

Senior ASIC Design Engineer

design team, you will implement, document and deliver high performance, area and power efficient RTL to achieve design... limitations. Craft micro-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design...

Lugar: Santa Clara, CA | 19/11/2025 18:11:53 PM | Salario: S/. No Especificado | Empresa: Nvidia