RFIC Layout Engineer

and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering...

Lugar: Austin, TX | 05/11/2025 20:11:52 PM | Salario: S/. No Especificado | Empresa: Apple

CPU Implementation Engineer

-offs • Drive RTL-to-GDS design convergence through microarchitecture and logic (RTL) optimizations using synthesis...

Lugar: Santa Clara, CA | 05/11/2025 19:11:00 PM | Salario: S/. No Especificado | Empresa: Apple

Graphics Power Analysis & Optimization Engineer

estimation, power targets and perform what-if analysis at architectural evaluation stage. - Support RTL and gate-level power... power optimizations in both RTL and gates. - Identify the best power sign-off tests to improve power analysis coverage...

Lugar: Austin, TX | 05/11/2025 19:11:05 PM | Salario: S/. No Especificado | Empresa: Apple

Graphics Power Analysis & Optimization Engineer

estimation, power targets and perform what-if analysis at architectural evaluation stage. - Support RTL and gate-level power... power optimizations in both RTL and gates. - Identify the best power sign-off tests to improve power analysis coverage...

Lugar: Austin, TX | 05/11/2025 19:11:53 PM | Salario: S/. No Especificado | Empresa: Apple

CPU Physical Design Engineer

design. Description As a CPU Physical Design Engineer, you will drive or participate in the following: • Drive RTL-to-GDS...

Lugar: Santa Clara, CA | 05/11/2025 19:11:06 PM | Salario: S/. No Especificado | Empresa: Apple