Wireless SoC Design Engineer

spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation... established design guidelines, owning all aspects of RTL development design. Integrate IP blocks and optimize memories/hard...

Lugar: Los Angeles, CA | 30/10/2025 19:10:14 PM | Salario: S/. No Especificado | Empresa: Apple

Design Verification Engineer

hardware systems-ranging from individual IP blocks to subsystems and full SoC-working closely with architecture, RTL, software...

Lugar: San Francisco, CA | 30/10/2025 18:10:08 PM | Salario: S/. No Especificado | Empresa: OpenAI

DDR Design Engineer

collaboration with architecture, circuit designers and verification engineers. Providing high-quality RTL description, including... assertions, for the design. Formal tools and static checkers will be used to guarantee RTL quality. Supporting design...

Lugar: Cupertino, CA | 30/10/2025 18:10:33 PM | Salario: S/. No Especificado | Empresa: Apple

Verification Engineer

of industry standard verification methodologies and tools Hands on and In-depth knowledge in UVM, System Verilog, RTL design...

Lugar: San Jose, CA | 30/10/2025 18:10:51 PM | Salario: S/. $120000 - 192000 per year | Empresa: Broadcom

Senior DFT Engineer

vendor tools Good exposure to cross functional areas including RTL & clocks design, STA, place-n-route and power, to ensure...

Lugar: Santa Clara, CA | 30/10/2025 02:10:07 AM | Salario: S/. No Especificado | Empresa: Nvidia

Senior Principal Digital IC Design Engineer

. Implement designs using good RTL coding and low power techniques. Collaborate with the backend team to close on synthesis... to be: Fluent in System Verilog RTL coding techniques. Familiar with modern SoC architectures and various interface technologies...

Lugar: Santa Clara, CA | 30/10/2025 01:10:01 AM | Salario: S/. No Especificado | Empresa: Marvell

DDR Design Engineer

collaboration with architecture, circuit designers and verification engineers. Providing high-quality RTL description, including... assertions, for the design. Formal tools and static checkers will be used to guarantee RTL quality. Supporting design...

Lugar: Austin, TX | 29/10/2025 22:10:35 PM | Salario: S/. No Especificado | Empresa: Apple

Timing Design Engineer

to achieve sign-off quality timing constraints. You will closely interact with RTL designer to understand design intent and clock...

Lugar: Cupertino, CA | 29/10/2025 20:10:29 PM | Salario: S/. No Especificado | Empresa: Apple