Senior Staff Physical Verification CAD engineer - EDA Tools

, and physical implementation. Proficiency with tools such as Cadence, Synopsys, Mentor Graphics, and scripting languages like Tcl..., Perl, Python. Synopsys ICV is required, and Mentor Calibre svrf / tvf is preferred. Design Flow: Strong understanding...

Lugar: Santa Clara, CA | 04/12/2025 03:12:02 AM | Salario: S/. $124420 - 186400 per year | Empresa: Marvell

Principal/ Senior Principal Digital ASIC Circuit Design Engineer

with current ASIC design tools for all phases described below: Simulation – Mentor ModelSim, Cadence Excelium, Incisive or Synopsys... VCS - Synthesis – Synopsys Design Compiler, Cadence Genus or Cadence RTL Compiler - Static Timing – Synopsys Primetime...

Lugar: USA | 26/11/2025 18:11:31 PM | Salario: S/. $119600 - 179500 per year | Empresa: Northrop Grumman

Jr. ASIC Design Engineer

CAD/EDA design tools, such as Cadence, Synopsys and Mentor for the IC design. Familiarity with principles...

Lugar: Batavia, IL | 24/11/2025 18:11:19 PM | Salario: S/. $70800 - 100667 per year