Seasonal ASIC Design Associate_2

Physics, or related field. Experience with EDA tools (Cadence, Synopsys, or equivalent) for circuit design and simulation...

Lugar: Batavia, IL | 11/11/2025 23:11:47 PM | Salario: S/. No Especificado

Digital Verification Engineer

behavioral model verification Hands-on knowledge of standard industry EDA tools - Synopsys/Cadence Experienced with GLS...

Lugar: San Jose, CA | 11/11/2025 21:11:38 PM | Salario: S/. No Especificado | Empresa: Broadcom

Integration Engineer

design and RTL development (SystemVerilog, Verilog). Familiarity with SoC design flows and tools (e.g., Synopsys, Cadence...

Lugar: Santa Clara, CA | 07/11/2025 03:11:37 AM | Salario: S/. $126800 - 190900 per year | Empresa: Apple