with Cadence, Siemens and/or Synopsys emulators Expertise with emulators and how to debug system level problems Familiarity...
-out Familiarity with analog ASIC design tools (Synopsys, Cadence, etc). Demonstrated experience in digital ASIC (System...
(Python, Perl, TCL, shell programming) Experience with Synopsys Design Constraints (SDC) At Cisco we connect...
(or other equivalent field) with 5+ years of related work experience. Prior experience using Synthesis Tools: Synopsys DC/DCG/FC. Prior... experience in Static Timing Analysis & ECO: Synopsys Primetime/Cadence Tempus. Prior experience with scripting such as TCL, Perl...
Transfer Level (RTL) and X propagation simulations using tools such as Synopsys Verdi; DE developing C++ test cases...
tools, including Cadence Genus and Innovus, Synopsys IC Compiler, Fusion Compiler, and verification tools like Calibre...
, Synopsys). Deep understanding of digital design principles, including FSMs, data path architectures, and low power design...
(Cadence, Synopsys, and/or Mentor) including: Regression management, coverage closure and analysis, testbench analyzer, formal...
verification tools (Cadence, Synopsys, and/or Mentor) including: Regression management, coverage closure and analysis, testbench...
, Microsemi (Actel) FPGA, Mentor Graphics, Synopsys, Cadence, Formal Verification Experience in TCL, Perl, or Python...