Design Engineer - STA

such as Synopsys PrimeTime or Cadence Tempus. Define and execute timing signoff methodologies, including process corners, derates... environments. Proficiency in Python, Perl, or Ruby preferred. Hands-on experience with Synopsys and/or Cadence STA tools highly...

Lugar: Fort Collins, CO | 02/09/2026 21:09:14 PM | Salario: S/. $109700 - 175500 per year | Empresa: Broadcom

I/O Design Engineer

physical design and verification. Build Verilog, Synopsys Liberty and IBIS models. Create and maintain detailed technical...

Lugar: Chandler, AZ | 12/08/2026 22:08:56 PM | Salario: S/. $109700 - 175500 per year | Empresa: Broadcom

Sr. Financial Planning & Analysis

At-Synopsys,-we-want-talented-people-of-every-background-to-feel-valued-and-supported-to-do-their-best-work.-Synopsys...);" In-addition-to-the-base-salary,-this-role-may-be-eligible-for-an-annual-bonus,-equity,-and-other-discretionary-bonuses.-Synopsys...

Lugar: Hillsboro, OR | 06/11/2026 00:11:07 AM | Salario: S/. $116000 - 174000 per year | Empresa: Synopsys

SoC Design Engineer

with verification methodologies such as UVM. Experience using Synopsys tool suites including VCS, Verdi, SpyGlass, Design Compiler...

Lugar: Atlanta, GA | 21/10/2026 00:10:09 AM | Salario: S/. $73150 - 174000 per year | Empresa: Capgemini

Analog and RF Layout Engineer

with Cadence, Mentor Graphics, or Synopsys EDA tools. Experience with transceivers, CMOS drivers, high-speed data converters...

Lugar: Santa Clara, CA | 14/10/2026 19:10:14 PM | Salario: S/. $73150 - 174000 per year | Empresa: Capgemini

Physical Design (Multiple levels)

/SoC Physical Design implementation. Place and Route using Cadence Innovus and/or Synopsys Fusion Compiler. Static Timing... Analysis and timing closure using Synopsys PrimeTime SI. Physical verification and design sign-off methodologies. Formal...

Lugar: San Diego, CA | 10/08/2026 17:08:20 PM | Salario: S/. $115600 - 173400 per year | Empresa: Qualcomm

Staff Engineer- DFT

of experience Hands-on with scan/ATPG/MBIST/JTAG using Synopsys or Siemens tools. Good Verilog/SystemVerilog and scripting (Tcl...

Lugar: Santa Clara, CA | 06/11/2026 01:11:15 AM | Salario: S/. $113920 - 170600 per year | Empresa: Marvell

Senior Staff IT Audit - Auditor Lead

At-Synopsys,-we-want-talented-people-of-every-background-to-feel-valued-and-supported-to-do-their-best-work.-Synopsys...);" In-addition-to-the-base-salary,-this-role-may-be-eligible-for-an-annual-bonus,-equity,-and-other-discretionary-bonuses.-Synopsys...

Lugar: USA | 17/10/2026 01:10:50 AM | Salario: S/. $113000 - 169000 per year | Empresa: Synopsys

Workplace Resources, Sr Staff

At-Synopsys,-we-want-talented-people-of-every-background-to-feel-valued-and-supported-to-do-their-best-work.-Synopsys...);" In-addition-to-the-base-salary,-this-role-may-be-eligible-for-an-annual-bonus,-equity,-and-other-discretionary-bonuses.-Synopsys...

Lugar: Morrisville, NC | 30/10/2026 22:10:12 PM | Salario: S/. $112000 - 168000 per year | Empresa: Synopsys