Strategic Engagements Manager

At-Synopsys,-we-want-talented-people-of-every-background-to-feel-valued-and-supported-to-do-their-best-work.-Synopsys...);" In-addition-to-the-base-salary,-this-role-may-be-eligible-for-an-annual-bonus,-equity,-and-other-discretionary-bonuses.-Synopsys...

Lugar: USA | 07/05/2026 00:05:31 AM | Salario: S/. $121000 - 181000 per year | Empresa: Synopsys

Engineer, ASIC Physical Design

using Tempus (cadence) or Primetime (synopsys). 4\. Place and Route: Cadence tools (Innovus/Tempus) or Synopsys tools... (ICC2 or Fusion Compiler/Primetime). 5\. Physical verification: Mentor tools (Calibre) or Synopsys tools (IC Validator...

Lugar: Minneapolis, MN | 30/05/2026 20:05:35 PM | Salario: S/. $142506.02 - 176000 per year | Empresa: Micron

Design Verification Engineer

and methodologies (UVM, SVA) Experience with Synopsys, Cadence, and Mentor simulations tools Demonstrated ability to plan and deploy...

Lugar: Broomfield, CO | 22/04/2026 20:04:50 PM | Salario: S/. $108000 - 172800 per year | Empresa: Broadcom

Talent Acquisition Partner

At-Synopsys,-we-want-talented-people-of-every-background-to-feel-valued-and-supported-to-do-their-best-work.-Synopsys...);" In-addition-to-the-base-salary,-this-role-may-be-eligible-for-an-annual-bonus,-equity,-and-other-discretionary-bonuses.-Synopsys...

Lugar: Sunnyvale, CA | 08/05/2026 22:05:03 PM | Salario: S/. $115000 - 172000 per year | Empresa: Synopsys

Senior Staff Emulation Engineer

(Python, Perl, Tcl, shell) and tooling enhancements. - Interface with EDA vendors (Synopsys, Cadence, Siemens) to evaluate... offerings from leading vendors such as Synopsys, Cadence, and Siemens, with deep experience in building complex SoC...

Lugar: Santa Clara, CA | 20/05/2026 20:05:19 PM | Salario: S/. $113920 - 170600 per year | Empresa: Marvell

Senior Staff Emulation Engineer

(Python, Perl, Tcl, shell) and tooling enhancements. - Interface with EDA vendors (Synopsys, Cadence, Siemens) to evaluate... offerings from leading vendors such as Synopsys, Cadence, and Siemens, with deep experience in building complex SoC...

Lugar: Santa Clara, CA | 05/05/2026 18:05:24 PM | Salario: S/. $113920 - 170600 per year | Empresa: Marvell

Design For Test Engineer IV (IC)

and 5nm Networking chips, IP DFT work RTL checks for scan-insertion compatibility using Synopsys Spyglass Scan-Insertion... Modus & Synopsys Tetramax Pattern Simulation: Without timing, With timing for different corners Tools: VCS Mismatch...

Lugar: San Jose, CA | 02/04/2026 21:04:11 PM | Salario: S/. $112200 - 170500 per year | Empresa: Arrow Electronics