FPGA Circuit Design Engineer

of experience with static timing analysis (STA) and tools such as Synopsys PrimeTime 10+ years of experience using scripting...

Lugar: San Jose, CA | 30/03/2026 02:03:46 AM | Salario: S/. No Especificado | Empresa: Altera

Lead ASIC DFT Engineer

in scan architecture, ATPG, MBIST, LBIST, JTAG, boundary scan, and silicon debug. Hands-on experience with Synopsys, Cadence...

Lugar: San Jose, CA | 29/03/2026 02:03:43 AM | Salario: S/. No Especificado | Empresa: Cyient

Emulation Engineer

. Job Description: Skills: Verilog, VHDL, System Verilog, Xilinx FPGA, HAPS, Vivado, C/C++Synopsys ZeBu, Cadence Palladium/Protium... with Synopsys HAPS prototyping platforms. Solid understanding of SoC bring-up, debug methodologies, and waveform analysis...

Lugar: Austin, TX | 28/03/2026 23:03:17 PM | Salario: S/. No Especificado | Empresa: Varite