Design Verification Infrastructure Sr. Staff Engineer

elaboration) and Synopsys VCS — so adding a simulator is a new backend and nothing else changes Assemble self-contained, token... simulator — Cadence Xcelium and/or Synopsys VCS Coverage concepts: collection, merge, and closure Comfort using AI coding...

Lugar: Santa Clara, CA | 30/07/2026 02:07:01 AM | Salario: S/. $127630 - 191200 per year | Empresa: Marvell

R&D Engineer IC Design 4

: · TCL/Perl scripting · Synthesis experience with either Synopsys Design Compiler/ DC topo or Cadence RTL compiler... · Understanding of liberty LIB models for timing · Formal verification (Synopsys Formality / Cadence Conformal) · Spyglass Lint...

Lugar: USA | 30/07/2026 00:07:32 AM | Salario: S/. $121900 - 195000 per year | Empresa: Broadcom

CPU Verification Engineer

Engineering, Computer Engineering, or related STEM field Experience with Synopsys simulators (e.g., VCS), debug tools...

Lugar: Austin, TX | 29/07/2026 23:07:24 PM | Salario: S/. No Especificado | Empresa: Intel

ESD & CAD Design Manager

proficiency in multiple CAD software platforms (e.g., Cadence Virtuoso, Synopsys Primetime, Ansys Seascape/Redhawk/Totem...

Lugar: Chandler, AZ | 29/07/2026 19:07:36 PM | Salario: S/. No Especificado | Empresa: Broadcom

Sr. Physical Design Engineer, Annapurna Labs

, Mentor Graphics, Synopsys, or Others) including synthesis, equivalency verification, floor planning, bus / pin planning... Graphics, Synopsys, or Others) develop flows for synthesis, formal verification, floor planning, bus / pin planning, place...

Lugar: Austin, TX | 28/07/2026 21:07:35 PM | Salario: S/. No Especificado | Empresa: Amazon