Staff Analog Design Engineer
experience with UNIX and the Cadence design environment (schematic, simulation, SPF extraction) Familiarity with Synopsys tools...
experience with UNIX and the Cadence design environment (schematic, simulation, SPF extraction) Familiarity with Synopsys tools...
such as Cadence, Synopsys, Mentor Graphics, etc. Understanding of ASIC design flow and verification methodologies Active Secret...
Familiarity with ITAR regulations and defense/aerospace industry requirements Knowledge of EDA tools and design flows (Synopsys...
, Synopsys, Calibre) Demonstrate a strong ability to debug problems through root-cause analysis, find effective and efficient...
, Synopsys, Calibre) Demonstrate a strong ability to debug problems through root-cause analysis, find effective and efficient...
, Synopsys Synplify Familiarity with TCL, Perl, Python or another scripting language Familiarity with FPGA modules simulation...
architecture Familiarity with Synopsys VCS, Cadence Xcelium, Siemens Questa, VC Formal, Verdi, or comparable industry tools...
hands-on experience with industry-standard power analysis and sign-off tools (e.g., Synopsys Pt-PX / PrimePower, Ansys...
and methods, leveraging both Synopsys and Cadence solutions and tools. Improving the SoC Synthesis and DFT Stitch...
, such as AMD/Xilinx ISE/Vivado, Intel/Altera Quartus, Siemens/Mentor Graphics, Synopsys Synplify Familiarity with TCL, Perl...