Lead ASIC DFT Engineer

, and silicon debug. Hands-on experience with Synopsys, Cadence, and Siemens/Mentor EDA tools. Proven experience in scan insertion...

Lugar: USA | 23/07/2026 17:07:13 PM | Salario: S/. No Especificado | Empresa: Sapsol Technologies

Senior Design Verification Engineer

Palladium, Synopsys ZeBu, Mentor Veloce) for system-level verification and performance validation. Collaborate with design...-on experience with emulation-based verification platforms (e.g., Cadence Palladium, Synopsys ZeBu, or Mentor Veloce). Solid...

Lugar: Sunnyvale, CA | 23/07/2026 02:07:15 AM | Salario: S/. No Especificado | Empresa: Hewlett Packard Enterprise

DFT Implementation Engineer

with industry-standard DFT tools such as Siemens EDA (Mentor) Tessent, Synopsys DFT Compiler, or Cadence Modus Proficiency...

Lugar: Austin, TX | 22/07/2026 19:07:50 PM | Salario: S/. No Especificado | Empresa: Intel