IP Design Verification Engineer

, Verilog, and advanced verification methodologies such as UVM and OVM. industry-standard EDA tools such as Synopsys VCS...

Lugar: Chandler, AZ | 24/06/2026 21:06:28 PM | Salario: S/. No Especificado | Empresa: Intel

Layout Designer

Virtuoso, Synopsys, Calibre) Demonstrate a strong ability to debug problems through root-cause analysis, find effective...

Lugar: San Jose, CA | 22/06/2026 22:06:48 PM | Salario: S/. No Especificado | Empresa: Micron

Lead ASIC Design Engineer

Fluency: Deep experience with front-end EDA tools for synthesis, STA, and CDC analysis (e.g., Synopsys or Cadence tool suites...

Lugar: San Jose, CA | 21/06/2026 02:06:29 AM | Salario: S/. No Especificado | Empresa: Broadcom

HW & SW Applications Admin

OrCAD Capture, ConceptHDL, Synopsys HSPICE, and Ansys Electronics. Signal/Power Integrity (SI/PI): Cadence Sigrity, Agilent... major EDA/CAD suites (such as Cadence, Synopsys, Ansys, or PTC). DevOps & Infrastructure Skills: Practical administrative...

Lugar: Richardson, TX | 19/06/2026 19:06:23 PM | Salario: S/. No Especificado | Empresa: Celestica

Senior Staff CAD Engineer

& Signoff: Create, automate, and maintain robust chip-level and IP signoff flows using Siemens Calibre for DRC/LVS and Synopsys... of Siemens Calibre (DRC, LVS, PERC), Synopsys StarRC, and the Cadence Virtuoso/Innovus ecosystem. Scripting & Automation: Strong...

Lugar: San Jose, CA | 19/06/2026 17:06:10 PM | Salario: S/. $65 - 75 per hour | Empresa: Protingent