, and Synopsys custom design environments such as Virtuoso, Solido Design Environment, and Custom Compiler. Strong communication...
a Physical Design Engineer with strong hands-on experience in block-level and top-level Place & Route using Synopsys Fusion...-on expertise with Synopsys Fusion Compiler. Solid understanding of STA, timing closure, and MMMC methodologies. Experience...
of integrated circuits using SPICE and Verilog. ### Working knowledge of Synopsys and Cadence Virtuoso. Preferred...
modalities, and developing system models utilizing Synopsys Platform Architect to translate insights into precise implementation...
timing behavior, and large-scale automation using industry-standard tools such as Synopsys NanoTime and Cadence Liberate...
, architecting coverage and performing system debugging utilizing Cadence Xcelium simulator suite, Synopsys VCS or equivalent...
and transmission line theory, I/O design. Experience in circuit simulation such as Keysight ADS and Synopsys HSPICE. Preferred... EDA tools, including ANSYS HFSS/SIwave, Keysight ADS, Synopsys HSPICE, Cadence PowerSI/PowerDC. Job Profile...
and EDA vendors (Synopsys, Cadence) to resolve tool issues and influence vendor roadmaps. Define and enforce implementation...-and-route tools from Synopsys (DC/FC, ICC2, PrimeTime) and/or Cadence (Genus, Innovus, Tempus). Prior experience in data...
of UVM, OVM, VMM and/or System Verilog, Verilog test benches and usage of simulation tools/debug environments like Synopsys... to regression management is a plus. Experience with formal property checking tools such as Cadence (IEV), Jasper and Synopsys (VC...
Qualifications: 12+ months of experience in the following: Industry-standard EDA tools such as Cadence Virtuoso, Synopsys ICV...