ASIC Physical Designers - II
of experience in ASIC physical design. Proficiency in ASIC design tools, such as Synopsys ICC, Fusion Compiler) Knowledge...
Lugar: Austin, TX | 26/08/2026 17:08:42 PM | Salario: S/. No Especificado | Empresa: Net2Source
Principal ASIC Verification Engineer
-leading simulation tools (e.g., Cadence Xcelium, Synopsys VCS, Mentor Questa) and debug waveforms to validate design... simulation tools (e.g., Cadence Xcelium, Synopsys VCS, Mentor Questa) and waveform debugging. Preferred Skills and Experience...
Lugar: Sunnyvale, CA | 26/08/2026 02:08:38 AM | Salario: S/. No Especificado | Empresa: Hewlett Packard Enterprise
Electrical Systems Analysis (CAE) Engineer – 12V/48V - GM Defense
1D models of electrical components, subsystems, and full vehicle or product 12V/48V architectures using Synopsys Saber... experience in design, analysis, or testing of 12V/48V electrical systems or components. Proficient with Synopsys Saber simulator...
Lugar: USA | 26/08/2026 00:08:05 AM | Salario: S/. No Especificado | Empresa: General Motors
Design Engineer - STA
CMOS logic gates Experience using a static timing analysis tool. Preferably Synopsys PrimeTime and/or Cadence Tempus...
Lugar: Fort Collins, CO | 25/08/2026 23:08:22 PM | Salario: S/. No Especificado | Empresa: Broadcom
#Pre-Silicon Validation Engineer
with Cadence Palladium, Protium, Siemens Veloce, or Synopsys ZeBu platforms. Familiarity with FPGA implementation flows using...
Lugar: San Diego, CA | 25/08/2026 22:08:57 PM | Salario: S/. $98500 - 147700 per year | Empresa: Qualcomm
ASIC Verification Engineer
(e.g., Cadence Xcelium, Synopsys VCS, Mentor Questa) and debug waveforms to validate design functionality. Collaborate...., Cadence Xcelium, Synopsys VCS, Mentor Questa) and waveform debugging. Preferred Skills and Experience: Experience...
Lugar: Sunnyvale, CA | 25/08/2026 19:08:03 PM | Salario: S/. No Especificado | Empresa: Hewlett Packard Enterprise
RTL Design & Integration Engineer
. Experience with EDA tools (Synopsys Design Compiler, Primetime, VCS;Cadence Virtuoso). Knowledge of UVM/OVM verification...
Lugar: San Jose, CA | 23/08/2026 02:08:10 AM | Salario: S/. No Especificado | Empresa: Advanced Micro Devices
ASIC Technical Leader - Product Quality & Productization (Hybrid)
development lifecycle, specifically within the Silicon One pipeline and advanced FinFET processes (6nm/7nm). Mastery of Synopsys...
Lugar: San Jose, CA | 22/08/2026 17:08:24 PM | Salario: S/. No Especificado | Empresa: Cisco Systems
GPU Design Implementation Engineer
such as Synopsys Next Generation tools, Conformal LEC, Synopsys Formality and Synopsys PrimeTime Strong understanding of CMOS...
Lugar: San Diego, CA | 21/08/2026 17:08:12 PM | Salario: S/. No Especificado | Empresa: Qualcomm
NVIDIA 2027 Internships: Hardware Physical Design / VLSI
/Clock Distribution, Chip Assembly, Timing Closure, Power and Noise Analysis, and Back-End Verification EDA Vendor (Synopsys...++, TCL, Linux, Scheme, Python, SKILL, Make, ICC2, Design Compiler, PrimeTime (Synopsys, First Encounter), Innovus, Virtuso...
Lugar: Santa Clara, CA | 21/08/2026 02:08:44 AM | Salario: S/. No Especificado | Empresa: Nvidia