Electrical Engineer/ FPGA Engineer

), Reset Domain Crossing (RDC), Questa Lint, Synopsys (DC/Primetime/Synplify), Xilinx/Intel/Microchip EDA (Vivado/Libero... flows/methodologies including Synopsys DC/Primetime/Synplify, Xilinx/Intel/Microchip EDA including HLS, Mentor Questa family...

Lugar: Camden, NJ | 26/03/2026 00:03:48 AM | Salario: S/. No Especificado | Empresa: Innova Solutions

ASIC Engineer - SDC

constraints for complex SoC designs. Expertise in Static Timing Analysis (STA) using tools such as Synopsys PrimeTime or Cadence... structures and recommend timing-driven micro-architectural improvements. Expertise with constraint analysis tools (Synopsys TCM...

Lugar: San Jose, CA | 20/03/2026 18:03:23 PM | Salario: S/. No Especificado | Empresa: Cisco Systems