), Reset Domain Crossing (RDC), Questa Lint, Synopsys (DC/Primetime/Synplify), Xilinx/Intel/Microchip EDA (Vivado/Libero... flows/methodologies including Synopsys DC/Primetime/Synplify, Xilinx/Intel/Microchip EDA including HLS, Mentor Questa family...
, Synopsys ICC2/PrimeTime, Siemens Calibre or equivalent). Solid understanding of STA fundamentals, clocking, constraints (SDC...
elements, and MMICs. Establish a flexible PDK defining the CLAWS RF technologies. Utilize TCAD simulation (e.g., Synopsys...
, such as Cadence Genus, Innovius, Conformal, Tempus, Voltus, or Synopsys Design Compiler, IC Compiler, Fusion Compiler, PrimeTime...
Design and Signoff tools, such as Cadence Genus, Innovius, Tempus, Voltus, or Synopsys Design Compiler, IC Compiler, Fusion...
characterization is a plus. Experience with Synopsys TCAD tools and Cadence Virtuoso a plus. Position requires very strong analytical...
with scripting, installing and managing EDA tools (Cadence, Mentor, Synopsys), and supporting IC design engineers by maintaining...
Lugar:
Irvine, CA | 22/03/2026 23:03:02 PM | Salario: S/. $145000 - 190000 per year | Empresa:
MaxLinear with scripting, installing and managing EDA tools (Cadence, Mentor, Synopsys), and supporting IC design engineers by maintaining...
Lugar:
Irvine, CA | 22/03/2026 01:03:32 AM | Salario: S/. $145000 - 190000 per year | Empresa:
MaxLinear constraints for complex SoC designs. Expertise in Static Timing Analysis (STA) using tools such as Synopsys PrimeTime or Cadence... structures and recommend timing-driven micro-architectural improvements. Expertise with constraint analysis tools (Synopsys TCM...
implementations, coverage analysis, and more. Proficiency in Siemens-Tessent, Synopsys for DFT implementation, vector generation...